The present invention relates to methods and systems for storing and retrieving data, particularly data in the form of double-frequency coherent-phase signals, and especially concerns the technique of making a parity check of such data signals.
The double-frequency coherent-phase code is one technique for storing and retrieving information with respect to a data storage device, such as a magnetic record medium. In such a code, each binary bit experiences a change in level or polarity at the beginning and end of the bit. The double-frequency code involves the use of two frequencies, a unit frequency providing one complete cycle of flux change within a bit, and a double-unit frequency providing one-half cycle of flux change within a bit. Thus, the binary "1" may be represented on a magnetic record medium by a change in magnetization from a negative sense to a positive sense, or vice versa, at the centre of the bit; and the binary "0" would be represented by the absence of a change in magnetization at the centre of the bit.
Accordingly, when a binary digit is read from the storage device in a system based on such a code, a critical portion of the read signal is examined and within a precise time interval, or "sampling window", near the centre of the bit or cell, to determine the presence or absence of a polarity or level transition.
A parity check is a technique commonly used to determine whether the data retrieved or read-out of a storage device is exactly the same data originally stored or read-into the device. This method of checking for parity is executed by adding a parity bit to the data signal, the latter being in the form of a word having a plurality of data bits. In the case of an even parity check, if the data signal being stored has an even number of binary 1's, a "0" is recorded as the parity bit; and if the data signal has an odd number of binary 1's, a "1" is recorded as the parity bit. In the case of an odd parity check, the parity bit added would be the appropriate one to provide an odd number of binary 1's to the data word. Each time a data signal having a plurality of data bits is retrieved from the storage device, the number of 1's is sensed and compared with the parity bit. If they are alike, the data processing system continues to operate, but if they are unalike, an error signal is produced to indicate this error.